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Apple · Emeryville, CA
Define the digital architecture behind Apple's next generation of motion-aware experiences. The Motion Sensing Hardware organization designs the IMUs, magnetometers, pressure sensors, and other sensing ASICs that enable spatial computing, gesture input, head-tracked audio, and crash and fall detection across iPhone, iPad, Apple Watch, AirPods, and Vision Pro. The architectures and hardware our team invents are what become the features customers feel first. If you want to set the direction for what motion sensing on Apple products can do, this is your team. Description As a Digital ASIC Architect on the Motion Sensing Hardware team, you will own the digital architecture of motion sensing ASICs from concept through silicon, with the goal of delivering best-in-class sensing experiences across Apple's product line. You will analyze the application, then define cost and power optimized digital systems built around one or more processors, DSP cores, and custom control engines. You will translate high-level user and product requirements into a realizable system, build the high-level models that prove out the architecture, and author the detailed specifications that drive the rest of the IC development. This is a highly cross-functional role. You will work with circuit design, firmware, algorithms, software, and product teams to identify the critical interactions between the ASIC and the broader product, and you will produce the architectures and specifications that become the silicon Apple ships and the features customers feel. Responsibilities: Define the digital architecture needed to achieve the module ERS, including evaluation and down-selection of processor, DSP, memory, and interface IP and topologies against performance/power/area/risk Perform trade-off analysis and interface with the Analog ASIC Architect, MEMS Architect, Firmware Lead, and SoC team for system-level architectural decision making Define hardware/firmware partitioning, memory hierarchy, bus topology, clock and power domain structure, and peripheral integration Lead digital architecture reviews with vendor and internal stakeholders Develop sensing algorithms and signal processing pipelines, and build high-level models in MATLAB, Python, or SystemC to predict performance before RTL exists Co-simulate digital with a behavioral analog front-end and MEMS model to validate full system interaction, then correlate models against first silicon to close the loop for the next iteration Author IP-leve